Silicon Design Verification Engineer

Title: Silicon Design Verification Engineer
Location: Philadelphia, PA(Hybrid)
Duration: 12-months to begin with

Electrical Engineering - Design Integrated Circuits (IC) that power everyday electronic devices. Design custom or semi-custom silicon used on electronic devices, cloud infrastructure, machine learning, and AI computational platforms. Work across the entire silicon design lifecycle, including system architecture, design verification, RTL digital design, physical design, design for test (DFT), and Emulation. Preferred to have Active secret clearance

An experienced SoC Design Verification Engineer able to provide design verification services for multi CPU/DSP SoC.

The Work:
• Testbench development - System Verilog UVM and C tests
• Integration/development of C tests/APIs and SW build flow
• Integration/development of UVM mailboxes and HW/SW communication components
• Test plan development
• Power Aware testbench development and simulations
• Seamless porting between simulation/emulation/prototyping platforms
• Regression setup and debug for RTL/Gate Level Netlist/UPF PA sim/Emulation/Proto
• Coverage collection and closure
• Working with cross functional teams (DV/Arch/Design/FW) to identify coverage scope
• Engage with the team to drive continuous improvement to the verification environment to find more bugs and improve coverage
• Work as a team to grow together.
• Mentor and coach junior team members

Here’s what you need:
• A minimum of three years of experience with SoC Design Verification
• Bachelor’s Degree or equivalent (12 years) work experience (If an, Associate’s Degree with 6 years of work experience)

Bonus points if:
• Experience with PCIe Verification
• Experience with ARM Cortex
• In-depth knowledge of digital logic design, chip architecture and microarchitecture
• Experience in developing TestPlan/testbenches, SystemVerilog/UVM/C-based TestBench, and writing/debugging tests
• Experience with advanced verification techniques such as different booting verification, end-to-end verification; multiple CPUs verification as part of the IP is desirable.
• Experience in ARM AMBA protocols; AXI4, AHB and APB.
• Team player with excellent communication skills and be able to work independently on the verification efforts for a block/area of the design